Digital Design Manager at RenesasElectronics

Technical Manager role requiring 15+ years of experience of Digital design in Analog Mixed signal ICs for developing Power Management ICs as part of 2.6B$ Power Business Unit at Renesas. Primary responsibilities include leading team which will fully own defining the microarchitecture to developing all Digital components of power management ICs, starting from System requirements. Due to the complex nature of Chips and significant Analog as well as Digital contents, collaboration with cross-functional teams to ensure successful integration of Digital and Analog components in ICs, is a must. The candidate will work on a wide range of exciting and cutting edge PMICs, including Linear and Switching DC-DC converters powering the next generation of most sought-after phones and handheld devices. This is an early-stage growth opportunity where in the candidate will get to learn, build and over time contribute and influence the charter for Renesas’s massive Power product portfolio. Essential Functions: • Manage the Digital Design team in terms of costs, methods and staffing to support device/silicon design requirements and to meet design deadlines as set by the program schedule. • Mentor direct reports, giving appropriate guidance and support, and reviewing technical and behavioural performance regularly • Must have experience of defining Dig-Ana boundary and Digital design scope for Power Management ICs/Analog intensive ICs • Must have experience of defining the micro-architectures and sub-blocks for the ICs to ensure optimized Digital design, RTL design and Gate level netlist etc. • Must be aware of Power Sensitive digital design and doing Power estimation for the Digital I/Ps • Must be able to handle Clock Domain Crossing across multiple clock domains seamlessly and in a glitch free manner. Should be able to lead/collaborate for Logic Synthesis, Formal verification, Power estimation and STA. • Should have experience of OTP, MTP, Efuse read/writes, controller design and data bus handling, Register read/write, Trimming of Analog parts/functions, DFT architecture and integration. • Should be able to create Sequences (including Power UP/Down) and State Machines and Transitions to/from any state to another based on the IC requirements. • Should be an expert of one or more Power Chip Communication I/Ps and protocols e.g. I2C, PMBUS, SVI3, SVID etc. • Should be able to implement and analyse filters & feedback loops in Digital, conversant with Z-domain analysis. • Must have done multiple silicon debugs, root cause analysis of issues, design to silicon correlation etc. • Should understand commonly used control loop architectures (Constant Freq, Constant ON/OFF Time, Current mode etc) and pros/limitations of each. • Must be able to bring in innovative ideas to improve designs to meet challenging specifications and achieve better system performance. • Should be able to setup Digital design flows and methodologies including checklists, reviews to ensure quality designs and take them all the way to Silicon success.