Jobs → Engineering → PCB Layout Engineer

About the Role We are seeking an experienced PCB Layout Engineer to join our team. This role requires expertise in high-density, high-speed PCB design and hands-on experience with Cadence Allegro. Key Responsibilities • Design complex PCB layouts for high-speed applications • Utilize Cadence Allegro PCB Layout (Version 23.1 or above) • Implement HDI Technology including Blind/Buried Microvias • Apply high-speed design principles for DDR5/LPDDR5, HBM, PCIe Gen 5/6 • Use Constraint Editor (CES) for constraint-driven design • Ensure DFM, DFA, and DFT compliance Requirements • 10–14 years of experience in PCB layout engineering • Strong expertise in high-density, high-speed PCB design • Proficiency in Cadence Allegro PCB Layout (Version 23.1 or above) • Experience with HDI Technology and high-speed design • Knowledge of Constraint Editor (CES) and constraint-driven design • Understanding of DFM, DFA, and DFT principles • Preferred experience with complex SoC/Microprocessor/FPGA-Based PCB Design