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LeadFull-timePythonC++AWSGitGo
Salary Range
$153,000 - $207,000 /year
This salary is estimated based on similar roles. The actual salary may vary.
About the Role
SDD is seeking a Lead Firmware Engineer to implement complex system algorithms and interfaces in FPGAs for Radar and EW systems. This role involves designing, implementing, and verifying FPGA designs for signal processing across very wide bands, high data rate interfaces, and complex control logic.
Key Responsibilities
- →Map system-level radar requirements and algorithms to efficient FPGA architectures
- →Design and implement radar signal processing algorithms in FPGAs (pulse compression, FFT processing, CFAR detection, beamforming, Doppler processing)
- →Develop high-throughput, low-latency processing architectures for real-time radar applications
- →Implement waveform generation, digital down-conversion, and channelization in FPGA fabric
- →Design and optimize pipelined arithmetic units and custom DSP blocks for radar processing
- →Interface FPGAs with high-speed ADCs/DACs for radar RF front-end integration
- →Validating designs with simulation and verification techniques before hardware integration
- →Participating in FPGA development process improvement
- →Supporting full life cycle of development and integration of FPGA firmware into hardware systems
- →Creating and maintaining design documentation and test plans
- →Delivering technical briefings to a range of internal and external stakeholders
- →Coordinating with program managers and technical leads to manage task schedules and budgets
- →Providing mentorship to more junior engineers to accelerate their technical and professional development
- →Building and maintaining high-performing and empowered technical teams
Requirements
- ✓Ability to obtain a Top Secret (TS) security clearance, requiring U.S. citizenship
- ✓Bachelor’s degree and at least 7 years of applicable experience, or Master’s degree with 5 years, or PhD with 2 years
- ✓Experience with FPGA and SoC design entry using Verilog or VHDL
- ✓Experience implementing digital signal processing techniques, filter design, FFT/DFT, fixed-point optimization
- ✓Experience with design flow for Xilinx and/or Intel FPGAs
- ✓Experience with simulation tools such as ModelSim/Questa, VCS, or Incisive
- ✓Demonstrated desire to successfully pursue new challenges, improve and broaden technical skills
- ✓Capable of effectively working in a team environment, often under tight deadlines
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