SoC Design Engineer
Karthik KRemoteMIDPosted 12d ago
SoC DesignSubsystem IntegrationVerilogSystemVerilogVHDLCDC/RDCLintingDesign Quality FlowsSynthesisPlace-and-Route (P&R) DebuggingTCLPython ScriptingRTL-to-GDS Design Flows
About the Role
We are looking for an experienced SoC Design Engineer to lead SoC subsystem integration, RTL design support, and chip implementation activities.
Key Responsibilities
• Lead SoC subsystem integration
• Provide RTL design support
• Manage chip implementation activities
Requirements
• Expertise in SoC Design & Subsystem Integration
• Proficiency in Verilog, SystemVerilog & VHDL
• Experience with CDC/RDC, Linting & Design Quality Flows
• Knowledge of Synthesis & Place-and-Route (P&R) Debugging
• Familiarity with TCL & Python Scripting
• Understanding of RTL-to-GDS Design Flows