SoC Design Engineer
Mohd Abdul KhaderUnited StatesMIDPosted 12d ago
SystemVerilogVerilogVHDLTclPythonCDCRDCLintingPower AnalysisARM Cortex-A/RGPUsMMUsCache-coherent interconnectsSynopsys EDA toolsVCSVerdiSpyGlassDesign CompilerRTL ArchitectUVMEmbedded C
About the Role
We are looking for an experienced SoC Design Engineer to take ownership of the design, implementation, and integration of complex blocks and SoC subsystems. This role involves working across key stages of chip design, from defining architectural specifications to supporting physical design and PCB teams.
Key Responsibilities
• Author architecture specifications for SoC subsystems and lead SoC-level integration
• Collaborate with IP vendors to configure optimal subsystems
• Define and propagate constraints (timing/SDC and power intent/UPF) from block to top level
• Build and maintain design quality flows, including CDC, RDC, linting, and power analysis
• Analyze PPA (Performance, Power, Area) metrics and drive optimizations
• Support synthesis, place-and-route, timing closure, DfT, and PCB design teams
Requirements
• Master’s degree in Electrical Engineering, Computer Engineering, or equivalent practical experience
• 6+ years of hands-on experience in SoC integration
• Proven track record integrating complex subsystems such as CPUs, PCIe, and DDR
• Strong proficiency in RTL design (SystemVerilog, Verilog, or VHDL)
• Hands-on experience with quality flows (CDC, RDC, lint) and synthesis/power flows
• Scripting proficiency in Tcl and Python (2+ years)
Preferred Qualifications
• Experience integrating ARM Cortex-A/R cores, GPUs, MMUs, or cache-coherent interconnects
• Familiarity with Synopsys EDA tools (VCS, Verdi, SpyGlass, Design Compiler, RTL Architect)
• Broad understanding of RTL-to-GDSII, verification flows (UVM), and embedded C